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    科技新知 [110年11-12月]

    篇題:A Unique Approach to Generate Self-Aligned T-Gate Transistors in Counter-Doped Poly-Si with High Etching Selectivity and Isotropy

    文章出處:IEEE Electron Device Letters, vol. 41, no. 3, pp. 397–400, 31 Jan. 2020. DOI: 10.1109/LED.2020.2970756

    作者:Y.-A. Huang, C.-Y. Liang, K.-P. Peng, K.-M. Chen , G.-W. Huang , P.-W. Li , and H.-C. Lin*

    任職單位及部門:國立陽明交通大學電子所

        Abstract:

      A unique approach for fabricating poly-Si thin-film transistors (TFTs) with self-aligned T-shaped gate (T-gate) structure is reported. A counter-doped poly-Si process comprises an in-situ doped n+ poly-Si deposition followed by a subsequent shallow implantation of BF+2 . Both high etching isotropy in n+ poly-Si and high etching selectivity between n+ poly-Si and B-doped poly-Si in a Cl2-based plasma process are the key enablers for the fabrication of our T-gate structures. Thanks to good control in the shape and deformation of our T-gate structure, sidewall air-gap spacers in combination with self-aligned Ni silicided gate and source/drain were established. High-performance submicron poly-Si TFTs are evidenced by superior transfer characteristics measured on TFTs with effective gate length of 0.15 µm. The unique T-gate structure provides an effective way for possible production of poly-Si radio-frequency TFTs viable for emerging new applications.

      文章摘要:

      此研究成功開發一種具有自對準T型閘 (T-gate) 結構的多晶矽薄膜電晶體 (TFT) 的製造方法。首先沉積一n+ 多晶矽閘層,並在其表面淺層佈植BF2+。運用n+ 多晶矽與B 摻雜多晶矽之間的高蝕刻率比,以 及有效控制Cl2電漿蝕刻的等向性,成功完成T型閘結構。由於此方法對T型閘形狀和結構的良好控制,可形成自對準Ni矽化閘極和源/汲極,以及側壁氣隙邊襯(air spacers)。由製做閘極長度為0.15 µm的 TFT測得卓越的操控特性,驗證此方法的可行性。此獨特的T型閘製程與結構,可為新興的多晶矽射頻TFT應用提供了一條有效增進元件性能的路徑。

       

    網頁連結:https://ieeexplore.ieee.org/document/8977479

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